Space Critical EEE Components for EU non-dependence – RISC-V Microprocessor on 7nm
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See in 5 min if you're eligible for Space Critical EEE Components for EU non-dependence – RISC-V Microprocessor on 7nm offering max €18.0M funding💰 Funding Details
Funding Description – HORIZON-CL4-2025-02-SPACE-71
What is financed
* Development, validation and pre-qualification (up to TRL 5) of a radiation-tolerant RISC-V micro-processor fabricated on a 7 nm technology node.
* Establishment or reinforcement of a trusted, export-control-free EU (or EU-trustable) supply chain for design, tape-out, manufacturing, packaging, test and evaluation of the device.
* Generation of a full space-qualification data-pack (marked sensitive) and compliance with applicable ECSS/ESCC/JEDEC/EN standards.
* Mandatory horizontal activities:
* Supply-chain mapping & vulnerability analysis
* Business plan & market insertion roadmap (including IRIS2, Copernicus, Galileo, etc.)
* Literature / state-of-the-art gap analysis
* Export-control screening & mitigation measures
Budget & Funding Rate
* EU contribution (RIA): 100 % of eligible direct costs + 25 % flat-rate indirect costs.
* Indicative grant size for this topic: €4.5 – 5 million (up to the legal ceiling of €18 million if strongly justified by scale or pilot lines).
* One project is expected to be funded.
* Payments are performance-based, linked to work-package milestones and deliverables (including the six-month confidential deliverables to DG-DEFIS/HaDEA).
Eligibility Snapshot
* Applicants must be legal entities established in an EU Member State, Norway or Iceland.
* Entities directly or indirectly controlled by non-eligible countries/entities may participate only with national guarantees accepted by their Member State AND the Commission.
* No involvement of ITAR/EAR-controlled items; EAR99 parts must be declared.
* Consortium minimum: three independent entities from three different eligible countries (standard HE rule), but single-beneficiary possible if it can cover the whole value chain.
* Sub-contractors and affiliates: same geographical/ownership restrictions apply for four years after project end.
Timing
* Call opens: 22 May 2025
* Deadline (single stage): 25 Sep 2025 – 17:00 CET
* GA signature target: Q1 2026
* Typical project duration: 36–48 months
Compliance & IPR
* Results must remain export-control-free and accessible to any EU entity for ≥4 years post-project at fair market terms.
* Prior notification/approval required for ownership transfer or exclusive licensing during that period.
📊 At a Glance
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🇪🇺 Strategic Advantages
EU-Wide Advantages & Opportunities for "Space Critical EEE Components – RISC-V Microprocessor on 7 nm"
1. **Strategic Autonomy & Non-Dependence**
• Consolidates the EU Chips Act, Critical Raw Materials Act and EU Space Programme into a single flagship demonstrator, providing a visible proof-point that the Union can master advanced nodes (7 nm) without ITAR/EAR constraints.
• Enables institutional customers (ESA, EUSPA, IRIS2, Copernicus, Galileo, GOVSATCOM, EU SST) to procure microprocessors fully immune to third-country export licences or end-use vetting.
2. **EU-Level Supply-Chain Resilience**
• Opportunity to build an integrated, ITAR-free value chain: design (IP, EDA), front-end fabs in the EU (e.g. IMEC/Hauts-de-France, GlobalFoundries-Dresden, ST-Crolles), OSAT, radiation-hardening labs, test & qualification centres.
• Joint EU procurement power lowers the risk of single-supplier dependency and mitigates recent geo-political shocks in the semiconductor ecosystem.
3. **Critical Mass & Aggregated Demand**
• Space alone is low-volume; pan-EU coordination couples demand from defence, automotive ADAS, edge-AI, quantum control and HPC accelerators, justifying the NRE for a 7 nm tape-out and mask-set (~€40-50 M).
• Member States’ co-funding and Important Projects of Common European Interest (IPCEI-ME/CT) can be leveraged to exceed the Horizon budget ceiling.
4. **Economies of Scale in R&D & Manufacturing**
• Shared EU infrastructure (e.g. EuroHPC, EDA Catapult, ECSEL KDT clusters) reduces per-partner R&D cost by pooling clean-room time, multi-project wafer shuttles, rad-test campaigns and Metis packaging lines.
• Pan-European pilot lines can move quickly to small series production (TRL5→TRL6/7), shortening time-to-market for both space and terrestrial derivatives.
5. **Standardisation & Certification Leadership**
• Joint work on ECSS/ESCC, EN ISO 9001, JEDEC JESD57 and RISC-V ISA extensions positions Europe as the de-facto authority for radiation-tolerant open-source processors.
• Facilitates creation of a European “trusted design platform” label recognised by NATO and EU defence procurement.
6. **Talent Pool & Skills Mobility**
• Cross-border PhD/industrial doctorate programmes (Marie-Skłodowska-Curie, EIT Digital) ensure a steady stream of design verification, rad-hardening and embedded-SW experts.
• Alignment with the Pact for Skills – Microelectronics eases labour mobility and certification across Member States.
7. **Synergies with EU Funding Instruments**
• Blending with InvestEU, CASSINI Growth Fund, EIB debt, European Defence Fund (EDF) and Digital Europe Test-Beds can cover scale-up to TRL8/9.
• Access to in-orbit demonstration via IOD/IOV Flight Ticket Initiative offers early flight heritage, a prerequisite for institutional procurements.
8. **Market Uptake & Downstream Industries**
• Creates a dual-use RISC-V ecosystem: secure routers, quantum-safe cryptography modules, GNSS receivers, autonomous drones – all benefitting from space-grade reliability.
• SMEs and start-ups gain licence-free CPU cores (no ARM royalties) lowering entry barriers and fostering a European heterogeneous compute market.
9. **International Positioning & Negotiation Power**
• A successful EU 7 nm RISC-V line increases Europe’s leverage in WTO/G7 semiconductor negotiations and shapes global export-control discussions.
• Strengthens EU voice inside the RISC-V International board and opens paths for technology diplomacy with like-minded regions (Japan, Canada, Australia).
10. **Environmental & Social Governance (ESG)**
• Facilitates shorter, transparent supply chains with lower transport emissions and better recycling of high-k dielectrics and rare earths.
• Contributes to EU Green Deal objectives by enabling low-power, high-efficiency satellites that reduce constellation sizes and orbital debris.
**Key Opportunities for Applicants**
• Bundle complementary national projects (e.g. France’s “Nano 2025”, Germany’s “IPCEI-ME/CT wave 2”) to demonstrate EU-wide alignment and unlock additional points in the Horizon evaluation (Excellence & Impact).
• Form vertically-integrated consortia mixing:
• IP providers & design houses (Codasip, Cortus, BSC)
• Front-end fabs (ST, GF, Infineon/IMS)
• Rad-hardening specialists (Frontgrade Gaisler, Thales Alenia)
• Space primes (Airbus, OHB, Thales Alenia Space)
• Certification bodies (ESA ESTEC, DLR)
• End-users (EUSPA, national MoDs)
• Exploit open-source licensing to secure Freedom-to-Operate while meeting the call’s ITAR/EAR-free requirement.
• Plan early for qualification data-packs; budget for ECSS-Q-ST-60-05C and latch-up/SEU campaigns at CERN CHARM or RADEF (Finland).
• Use the grant to establish a commercialisation roadmap that extends to 28 nm/16 nm nodes for cost-sensitive LEO constellations, ensuring long-term revenue.
> By acting together, Member States can turn a critical vulnerability—the absence of sovereign, advanced-node space microprocessors—into a strategic asset that underpins Europe’s space, digital and security ambitions for the next decade.
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