Microelectronic – Front-End Module (FEM)
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HORIZON-JU-SNS-2025-01-STREAM-B-05 – Microelectronic Front-End Module (FEM)
What the call finances
* Action type: *HORIZON-JU-RIA – Research & Innovation Action*
* Total SNS JU envelope: up to €21 000 000 per project (100 % of eligible direct costs + 25 % flat-rate indirect costs)
* Opening date: 22 May 2025 Deadline: 18 September 2025 – 17:00 (Brussels)
* Page limit: 70 pages (Part B) – single-stage submission
* Geographical eligibility: legal entities established in *your country* that is an EU Member State, Associated Country, OECD or Mercosur country AND not controlled by a non-eligible country/entity (Art. 22(5) HE Regulation).
- High-risk suppliers of mobile network equipment are ineligible.
- Entities linked to Russia, Belarus, or non-government-controlled Ukrainian territories are ineligible.
Technical ambition funded
The JU seeks a complete FR3 (7–15 GHz, optional 24 GHz extension) Front-End Module design able to deliver:
1. ≥ 200 MHz carrier bandwidth with peak/user data-rates aligned with ITU-R M.2160 (IMT-2030) and 50 % energy-saving vs 5G.
2. Seamless support of cellular + FWA and Integrated Sensing & Communications (ISAC/JCAS).
3. Heterogeneous tech integration (CMOS/FDSOI, GaN-on-SiC, InP-on-Si, SiGe, BCD/LDMOS, optical I/O, etc.) ready for downstream Chips JU Pilot Lines.
4. Interference-aware FR3 co-existence with satellite incumbents + NTN cooperation.
5. Secure, AI/ML-enhanced, RISC-V-friendly SoC architecture with roadmap to mass-market European products.
Budget structure expectations
* ≥ 50 % of total requested EU contribution must be absorbed by SNS JU members (or their constituents/affiliates).
* Adequate SME participation is a decisive tie-breaker in ranking; high IKOP (In-Kind Operational Contribution) scores also valued.
* Open-science: AI/ML datasets created must be uploaded to the common SNS repository.
Typical eligible cost items
* Silicon/GaN/InP MPWs & mask sets, advanced packaging pilots, RF/EMD test-beds.
* High-power PA prototypes, antenna arrays, secure ISAC chiplets.
* Personnel (researchers, design engineers, standardisation specialists).
* Collaboration/liaison with WRC-27, 3GPP, ITU-R and Chips JU Pilot Lines.
Indicative project profile
* Consortium size: 8-20 beneficiaries bringing full value-chain (semiconductor, radio OEM, operator, satcom, academia, RTO).
* Duration: 36-48 months.
* TRL progression: starting ~TRL 3-4 ➜ delivering TRL 6 FEM demonstrator ready for pilot-line transfer.
🎯 Objectives
📊 At a Glance
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🇪🇺 Strategic Advantages
EU-Wide Advantages & Opportunities of the “Microelectronic – Front-End Module (FEM)” RIA
1. Single Market Access: 450+ Million Users/Customers
• Unified 6G Equipment Market: A pan-EU FEM reference design lowers fragmentation, making it easier to commercialise components for all 27 Member States without repetitious national certifications.
• Early Adopter Verticals: Energy-efficient FR3 FEMs unlock EU-wide Fixed-Wireless-Access roll-outs (rural broadband), smart-factory connectivity and secure sensing markets valued at €30-40 bn by 2030.
• Public-Procurement Leverage: Compliance with EU security rules (Article 22(5) restrictions) positions consortia for forthcoming public 6G procurement waves (e.g. Connecting Europe Facility 2 Digital, EU-funded cross-border corridors).
2. Cross-Border Collaboration & Knowledge Exchange
• Pan-European Industrial Chain: Combine RF CMOS leaders (France, Germany, Belgium), GaN/SiGe champions (Spain, Slovakia, Italy), packaging hubs (Portugal, Netherlands) and pilot lines funded under the Chips Joint Undertaking (JU). This mitigates the EU’s current 80 % import dependency on RF front-ends.
• Mandatory Collaboration Agreement: The call requires joint work with NTN and wireless R&I projects—creating a ready-made EU network for co-design, spectrum-sharing algorithms and satellite coexistence tests.
• Brain Circulation: Mobility budgets in Horizon-JU projects facilitate post-doc and engineer exchanges across EU RTOs (CEA-Leti, IMEC, Fraunhofer, VTT, Tyndall), reinforcing cohesion among cohesion-country institutions.
3. EU Policy Alignment & Strategic Value
• EU Chips Act & Digital Compass 2030: The topic explicitly links to transfer to Chip JU pilot lines, bolstering the EU target of 20 % global semiconductor share by 2030.
• Green Deal / Fit-for-55: 50 % transmission-energy reduction contributes directly to the EU’s 2030 energy-efficiency target; supports taxonomy-aligned “green ICT” investments.
• Secure & Resilient Connectivity Toolbox: Article 22(5) restrictions help the EU build technological sovereignty in strategic RF components—reducing reliance on high-risk suppliers flagged in the 5G Toolbox.
• Digital Europe Programme Synergy: The FEM’s RISC-V/SoC & AI functions complement DEP’s support for European open-source hardware stacks, reinforcing open strategic autonomy.
4. Regulatory Harmonisation Benefits
• Single Radio Equipment Directive (RED) Compliance: Designing with common EU safety & EMC rules in mind avoids 27 divergent conformity assessments.
• Spectrum Policy Certainty: The proposal tackles FR3 sharing with incumbents (satellite, defence); once approved by CEPT & WRC-27, a harmonised EU band plan accelerates deployment and cert testing.
• Common Cyber-Security Certification (EUCC): Integrated secure sensing/ICAS functions can be pre-aligned with the upcoming EUCC scheme—giving early movers a compliance edge.
5. Access to Europe’s Innovation Ecosystem
• Interface with 25+ Chip JU Pilot Lines: Direct eligibility for MPWs and prototyping services in agrégate, drastically cutting time-to-silicon.
• Living Labs & Testbeds: 6G-SNS Phase 1 & 2 platforms (8+ pan-EU testbeds) readily available for over-the-air validation at FR3, avoiding national duplication.
• Standardisation Fast-Track: ETSI, 3GPP and ISO/IEC workshops hosted in Europe allow consortium results to feed specs early—translating RIA outputs into global de-facto standards.
6. Funding Synergies & Layered Financing
• Cascade Funding Opportunities: Align with SNS “Stream C” large-scale trials (opens 2026) for system-level demos—leveraging the FEM as a mandatory hardware component.
• Structural Funds & IPCEI-ME/CT: Cohesion-region partners can co-finance pilot packaging lines through ERDF while using Horizon budget for R&D salaries.
• EIB/InvestEU Blending: Energy-efficient FEM IP is bankable under InvestEU’s Strategic Technologies window, unlocking growth-stage loans for scale-up fabs.
7. Scale & Impact Potential Across the Union
• Mass-Market Readiness: By targeting SoC integration and 200 MHz channels, the RIA paves the way for EU-wide 6G smartphones, CPE and industrial sensors by 2028.
• Pan-EU Carbon Savings: If deployed across 50 % of EU mobile sites, the 50 % efficiency gain equates to ~1.8 TWh annual electricity savings—cutting ~500 kt CO₂.
• Robust SME Participation: Tie-break rules reward higher SME share, promoting new entrants in packaging, AI accelerators and RF IP—fertilising the EU SME ecosystem.
8. Strategic Take-aways for Applicants
• Anchor the consortium in at least three EU semiconductor clusters (e.g. Grenoble-Leuven-Dresden) to exploit pilot-line complementarity.
• Map deliverables to Chips JU TRL gates (design → MPW → pilot → volume) to ensure seamless funding continuum.
• Embed standardisation & policy lobbying work-packages to influence WRC-27 FR3 and RED delegated acts—turning technical results into first-mover regulatory advantage.
• Allocate budget for cross-project AI dataset sharing (mandatory open repository), boosting visibility and citation.
Bottom line: Competing at national level would deny access to the EU’s integrated semiconductor value chain, unified spectrum policy and €150 bn multi-program funding pool. Leveraging this Horizon-JU RIA at EU scale converts Europe’s fragmented RF know-how into a sovereign, energy-efficient 6G front-end platform with global export potential.
🏷️ Keywords
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